Senior Formal Verification Engineer
Role Overview
We are looking for an experienced Senior Formal Verification Engineer to join our CPU development team as an XWF (Extended Workforce) member.
In this role, you will be responsible for driving the formal verification of CPU cache designs, ensuring comprehensive verification coverage and proof closure in alignment with the project's verification plan.
You will work closely with CPU architects, design engineers, and the verification team to verify complex microarchitectural features and solve challenging verification problems related to modern CPU design.
Key Responsibilities
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Translate formal verification requirements from the verification plan into complete formal proofs for the Design Under Test (DUT).
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Develop, implement, and maintain formal verification environments and methodologies for CPU cache verification.
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Create and debug SystemVerilog Assertions (SVA) to verify functional correctness.
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Analyze proof failures, identify root causes, and collaborate with design engineers to resolve issues.
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Drive formal verification closure while ensuring high-quality verification coverage.
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Debug complex microarchitectural behaviors, including:
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Branch prediction
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Memory concurrency
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Cache coherency and related cache behaviors
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Work closely with CPU architects and RTL designers to verify new features throughout the development lifecycle.
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Contribute to the continuous improvement of formal verification methodologies, processes, and best practices.
Required Skills & Qualifications
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Experience in Formal Verification.
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Extensive hands-on experience with Cadence JasperGold or equivalent formal verification tools.
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Strong expertise in SystemVerilog Assertions (SVA) and property-based verification.
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Deep understanding of CPU microarchitecture, including:
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Pipelines
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Cache architecture
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Branch prediction
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Memory concurrency
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Proven ability to translate verification requirements into complete and robust formal proofs.
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Strong debugging and analytical skills, with the ability to solve complex verification challenges.
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Excellent communication and collaboration skills.
Preferred Qualifications
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Experience verifying CPU IP or other complex processor subsystems.
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Experience working on high-performance CPU or SoC development projects.
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Familiarity with industry-standard verification methodologies and best practices.
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Experience working effectively in cross-functional engineering teams.
Key Competencies
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Formal Property Development
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SystemVerilog Assertions (SVA)
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JasperGold / Formal Verification Tools
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CPU Microarchitecture
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Cache Verification
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Proof Debugging and Closure
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Property-Based Verification
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RTL Debugging
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Cross-Functional Collaboration